Dynamic Template Learning for Top-Level Computer Management Using Bayesian Optimization

Abstract
Computing system administration is a difficult undertaking, particularly in complicated and shifting situations. Classical static methods often fall short of efficiently adjusting for shifting circumstances. In this study, we offer Dynamic Template Learning (DTL), a new method for automating top-level administration of computers that makes use of Bayesian optimization. The aim is to employ continuous performance evaluation and user-defined optimizations targets to constantly alter the system\'s settings and utilization of resources. The DTL architecture includes a feedback process that continually gathers performance information, evaluates the condition of the entire system, and draws lessons from the past in order to make wise choices. To effectively simulate system behavior while investigating the setting space, Bayesian optimizations is used. In order to find the best layouts, DTL uses probability modelling and acquisition procedures to dynamically examine choices. We experimented on a modelled machine with various strain conditions to assess the efficacy of DTL. The findings show that DTL performs better than conventional static techniques in aspects of system sales, usage of resources, and environmental adaption. Finding near-optimal solutions and quickly scanning the set-up field are both largely dependent on the Bayesian optimizations element. Additionally, we illustrate possible uses in real-world computing settings and talk about the advantages and disadvantages of the DTL technique. DTL\'s flexibility and adaptability makes it appropriate for a variety of infrastructure, including dispersed systems, data centers, and cloud computing systems. Organizations may increase system effectiveness, decrease staff involvement, and improve success overall by automated managerial processes.

Author
Rizgar Ramadhan Khuder

DOI
https://doi.org/10.1109/AECE59614.2023.10428660

Publisher
3rd International Conference on Advancement in Electronics & Communication Engineering (AECE)

ISSN
979-8-3503-3072-4

Publish Date: